[NFC][RISCV] Refactor allocation of the stack space #116625
Conversation
|
Thank you for submitting a Pull Request (PR) to the LLVM Project! This PR will be automatically labeled and the relevant teams will be notified. If you wish to, you can add reviewers by using the "Reviewers" section on this page. If this is not working for you, it is probably because you do not have write permissions for the repository. In which case you can instead tag reviewers by name in a comment by using If you have received no comments on your PR for a week, you can request a review by "ping"ing the PR by adding a comment “Ping”. The common courtesy "ping" rate is once a week. Please remember that you are asking for valuable time from other developers. If you have further questions, they may be answered by the LLVM GitHub User Guide. You can also ask questions in a comment on this PR, on the LLVM Discord or on the forums. |
|
@llvm/pr-subscribers-backend-risc-v Author: Raphael Moreira Zinsly (rzinsly) ChangesSeparates the stack allocations from prologue in preparation for the stack clash protection support. Full diff: https://github.com/llvm/llvm-project/pull/116625.diff 2 Files Affected:
diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
index 1d91d46cb30ee0..8ade1943a3433b 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -610,6 +610,25 @@ static MCCFIInstruction createDefCFAOffset(const TargetRegisterInfo &TRI,
Comment.str());
}
+void RISCVFrameLowering::allocateStack(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ StackOffset Offset, bool EmitCFI,
+ unsigned CFIIndex) const {
+ DebugLoc DL;
+ const RISCVRegisterInfo *RI = STI.getRegisterInfo();
+ const RISCVInstrInfo *TII = STI.getInstrInfo();
+
+ RI->adjustReg(MBB, MBBI, DL, SPReg, SPReg, Offset, MachineInstr::FrameSetup,
+ getStackAlign());
+
+ if (EmitCFI) {
+ // Emit ".cfi_def_cfa_offset StackSize"
+ BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
+ .addCFIIndex(CFIIndex)
+ .setMIFlag(MachineInstr::FrameSetup);
+ }
+}
+
void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
MachineBasicBlock &MBB) const {
MachineFrameInfo &MFI = MF.getFrameInfo();
@@ -726,16 +745,9 @@ void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
if (StackSize != 0) {
// Allocate space on the stack if necessary.
- RI->adjustReg(MBB, MBBI, DL, SPReg, SPReg,
- StackOffset::getFixed(-StackSize), MachineInstr::FrameSetup,
- getStackAlign());
-
- // Emit ".cfi_def_cfa_offset RealStackSize"
unsigned CFIIndex = MF.addFrameInst(
MCCFIInstruction::cfiDefCfaOffset(nullptr, RealStackSize));
- BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
- .addCFIIndex(CFIIndex)
- .setMIFlag(MachineInstr::FrameSetup);
+ allocateStack(MBB, MBBI, StackOffset::getFixed(-StackSize), true, CFIIndex);
}
// The frame pointer is callee-saved, and code has been generated for us to
@@ -776,20 +788,13 @@ void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
getStackSizeWithRVVPadding(MF) - FirstSPAdjustAmount;
assert(SecondSPAdjustAmount > 0 &&
"SecondSPAdjustAmount should be greater than zero");
- RI->adjustReg(MBB, MBBI, DL, SPReg, SPReg,
- StackOffset::getFixed(-SecondSPAdjustAmount),
- MachineInstr::FrameSetup, getStackAlign());
// If we are using a frame-pointer, and thus emitted ".cfi_def_cfa fp, 0",
// don't emit an sp-based .cfi_def_cfa_offset
- if (!hasFP(MF)) {
- // Emit ".cfi_def_cfa_offset StackSize"
- unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(
- nullptr, getStackSizeWithRVVPadding(MF)));
- BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
- .addCFIIndex(CFIIndex)
- .setMIFlag(MachineInstr::FrameSetup);
- }
+ unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(
+ nullptr, getStackSizeWithRVVPadding(MF)));
+ allocateStack(MBB, MBBI, StackOffset::getFixed(-SecondSPAdjustAmount),
+ !hasFP(MF), CFIIndex);
}
if (RVVStackSize) {
diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.h b/llvm/lib/Target/RISCV/RISCVFrameLowering.h
index c106b7b6754653..9aff4dc9e4089a 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.h
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.h
@@ -78,6 +78,9 @@ class RISCVFrameLowering : public TargetFrameLowering {
return StackId != TargetStackID::ScalableVector;
}
+ void allocateStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
+ StackOffset Offset, bool EmitCFI, unsigned CFIIndex) const;
+
protected:
const RISCVSubtarget &STI;
|
| BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION)) | ||
| .addCFIIndex(CFIIndex) | ||
| .setMIFlag(MachineInstr::FrameSetup); | ||
| allocateStack(MBB, MBBI, StackOffset::getFixed(-StackSize), true, CFIIndex); |
There was a problem hiding this comment.
Please add /*EmitCFI=*/ before the true operand.
Separates the stack allocations from prologue in preparation for the stack clash protection support.
|
@rzinsly Congratulations on having your first Pull Request (PR) merged into the LLVM Project! Your changes will be combined with recent changes from other authors, then tested by our build bots. If there is a problem with a build, you may receive a report in an email or a comment on this PR. Please check whether problems have been caused by your change specifically, as the builds can include changes from many authors. It is not uncommon for your change to be included in a build that fails due to someone else's changes, or infrastructure issues. How to do this, and the rest of the post-merge process, is covered in detail here. If your change does cause a problem, it may be reverted, or you can revert it yourself. This is a normal part of LLVM development. You can fix your changes and open a new PR to merge them again. If you don't get any reports, no action is required from you. Your changes are working as expected, well done! |
3 participants
Separates the stack allocations from prologue in preparation for the stack clash protection support.